RT-level Fault Simulation Based on Symbolic Propagation
نویسندگان
چکیده
The rapid rise in size and complexity of VLSI circuits has stimulated a need to handle fault simulation at higher levels of abstraction. We outline an RT-level fault simulation techniqueion. We outline an RT-level fault simulation technique that utilizes symbolic data to group fault effects. Experimental results show that the proposed methodology provides superior speed-ups and accurate fault coverages.
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تاریخ انتشار 2001